| 摘要 |
PURPOSE: To prevent a high frequency current from increasing by adding a load current and a compensating current to each other, and converting it into DC separately for each order of the harmonics, and comparing it with a set value on specified level. CONSTITUTION: An adder 18 adds a load current IL and a compensating current Ia to each other, and a DC converter 19 operates each order of the harmonics, and converts it into DC separately for each order of harmonics, and outputs DC signals Pa-Pd. And, comparators 20a-20d compare the DC signals Pa--Pd with a set value Pr separately for each order of the harmonics, and if it is less than the set value Pr, this turns into an usual operation mode. On the other hand, if the enlargement of a harmonic current ILh occurs, for example, the thirteenth DC signal Pd gets over the set value Pr, and a three-terminal analog switch 17d is switched over to the side of a changeover contact v. As a result, out of the harmonic currents ILh, only the thirteenth order of each- order-of-harmonic-operation part output signal are composed by each degree of higher harmonic adder 8b, with its polarity inverted, and are inputted into the adder 9. Thereupon, the harmonics increase phenomena of the concerning order is prevented. |
