发明名称 |
Shared channel subsystem has a self timed interface using a received clock signal to individually phase align bits received from a parallel bus |
摘要 |
A shared channel subsystem has an input-output element for coupling each of a plurality of input-output controllers to each of a plurality of processor nodes by means of a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal, providing a cost effective, modular input/output element.
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申请公布号 |
US5522088(A) |
申请公布日期 |
1996.05.28 |
申请号 |
US19940261641 |
申请日期 |
1994.06.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HALMA, MARTEN J.;CAPOWSKI, ROBERT S.;CASPER, DANIEL F.;FERRAIOLO, FRANK D.;SACHS, MARTIN W. |
分类号 |
G06F13/40;(IPC1-7):G06F13/42;G06F13/00 |
主分类号 |
G06F13/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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