VIDEO RAM INTERFACE CONTROL CIRCUIT USING DESIGNATION OF COORDINATE

摘要

The apparatus comprises a X coordinate register for outputting the most significant address bit to an address bus by applying a first register selection signal from the outside; a Y coordinate register for outputting the most significant address bit to the address bus by applying a second register selection signal from the outside; and a video RAM interface controller for generating the least significant address bit to the address bus, also generating a row address strobe signal, a column address strobe signal, an output enable signal, a write enable signal, and a ready signal, the video RAM interface controller being connected to apply write and read signals from the outside.