发明名称 Multiplexed data-address bus external connection circuit for peripheral
摘要 A data address bus (1), plug connection (5) and the temporary memories for address information (4.1, 4.2, 4.3, or 4.4) are provided.In a read step, a read command signal on control line is removed and transmitted parallel to address information to plug connection, and data on plug is passed to data address bus.
申请公布号 DE4440468(A1) 申请公布日期 1996.05.23
申请号 DE19944440468 申请日期 1994.11.15
申请人 SCHNEIDER, BERND, 01462 OCKERWITZ, DE 发明人 SCHNEIDER, BERND, 01462 OCKERWITZ, DE
分类号 G06F13/38;(IPC1-7):G06F13/38 主分类号 G06F13/38
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