发明名称 UNPACKAGED INFORMATION SIGNAL GENERATING CIRCUIT
摘要 <p>PURPOSE: To generate an errorless unpackaged information signal and to surely operate the whole device. CONSTITUTION: After turning on a power supply, a package mounted on the CPU 1 is initialized by software, and after the completion of the initialization, the CPU 1 sends a rise completion signal S1 to a register 2 and the register 2 stores the signal S1. An SR latch 5 stores an output from the register 2 through an inverter 3 and applies a level corresponding to the signal S1 to a logic gate 4. The gate 4 finds out logic between earth and an output from the latch 5 and sends an unpackaged information signal S4 being a logic result to a monitor and control package. Since the latch 5 is reset only by a power on clear signal Pc, the level of the signal S4 is not changed even if the level of the signal S1 is changed during the period of operation.</p>
申请公布号 JPH08123709(A) 申请公布日期 1996.05.17
申请号 JP19940263619 申请日期 1994.10.27
申请人 OKI ELECTRIC IND CO LTD 发明人 ISHIMATSU HIROKAZU
分类号 G06F1/18;G06F11/30;(IPC1-7):G06F11/30 主分类号 G06F1/18
代理机构 代理人
主权项
地址