发明名称 Input waiting line system especially provided for connection to the inputs of a blockage-free switching matrix of the spatial type
摘要 A queueing circuit serves an asynchronous switching circuit. A number of input circuits are connected to inputs of a switching network in a one-to-one relationship with the outputs of the switching matrix. During its own time slot, each of the input circuit has a series of availability signals which are assigned to time slots that are later than the input circuit's own time slot. These availability signals indicate the availability condition at the matrix output for enabling an emission of a data cell during the time slot identified by the availability signal. Based upon the availability signal, the cell is released from a memory storage during an available one of the later time slots.
申请公布号 US5517496(A) 申请公布日期 1996.05.14
申请号 US19940316527 申请日期 1994.09.30
申请人 FRANCE TELECOM 发明人 BOYER, PIERRE;COUDREUSE, JEAN-PIERRE;SERVEL, MICHEL
分类号 H04Q3/00;H04L12/56;H04Q3/52;(IPC1-7):H04L12/54;H04Q11/04 主分类号 H04Q3/00
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