发明名称 FORMATION OF TEST VECTOR
摘要 PURPOSE: To make it possible to effectively test an ultra-LSI (VLSI) circuit by taking out a failed function circuit, and combining it with a trouble-free function circuit to form a compound function circuit, etc. CONSTITUTION: A failed function circuit is pulled out, and combined with a trouble-free function circuit to form a compound function circuit. The function of energy of the compound function circuit is pulled out as a collection of secondary and tertiary terms. Then, a transitive closure(TC) of restriction which can be represented as a secondary-term relation, is determined to verify inconsistency, identification, fixation, and exclusion. The TC of a digital circuit is calculated from a directionally oriented graph and an implication graph. A directed edge in third graph is represented by an equation, and represents a controlling action of a true state of a signal x relating to a failed state of a signal y. A new secondary term is added to the directed edge to form a new implication graph, and a list of literals is pulled out. Then, test vectors in relation to failures are pulled out from the list of literals.
申请公布号 JPH08114657(A) 申请公布日期 1996.05.07
申请号 JP19920201749 申请日期 1992.06.18
申请人 NEC CORP;BISHIYUWANI AGURAWARU 发明人 SURIMATSUTO CHIYAKURADAARU;BISHIYUWANI AGURAWARU
分类号 G01R31/3183;G06F11/22;G06F17/50 主分类号 G01R31/3183
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