| 摘要 |
A gate insulating film is provided on the upper surface of an N-type silicon substrate. A floating gate is provided on the gate insulating film, an ONO film is provided on the floating gate, and a control gate is provided on the ONO film. Two diffusion layers for a source and a drain, respectively, are formed by using the control gate as a mask, in self-alignment, in the upper surface of the N-type silicon substrate. A damage layer is formed in a region of the semiconductor substrate, which is located beneath the first gate. The damage layer has an impurity concentration which is the highest at a point located in a depletion layer formed when a data-writing voltage is applied to the memory device and which is located outside a depletion layer formed when a data-reading voltage is applied to the memory device.
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