发明名称 Method of manufacturing a semiconductor memory device
摘要 When the surfaces of a selection gate electrode and a floating gate electrode are thermally oxidized with the selection gate electrode disposed below the floating gate electrode, the thickness of a gate oxide film formed on the selection gate electrode can be made larger than that of a gate oxide film formed on the other portion. As a result, the coupling ratio of a memory transistor can be increased. Thus, the coupling ratio can be adequately increased by partly increasing the thickness of the insulation film between the floating gate electrode and the semiconductor substrate.
申请公布号 US5514607(A) 申请公布日期 1996.05.07
申请号 US19940257008 申请日期 1994.06.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANEDA, HIROHITO
分类号 H01L21/8247;H01L21/28;H01L21/336;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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