SERIAL COMMUNICATION CIRCUIT

摘要

The circuit transmits data in high speed and is of use especially for retransmission. It includes following components. Latches(LT1~LT8) are connected parellel to data bus and they store or read data from a data bus and an input buffer(11). A clock counter(13) counts the number of clocks from a clock generator(12). Decoder(16) controls the output of latches(LT1~LT8) by decoding the value of clock count. Latch buffer(14) temporarily stores the output of latches and generates them by clock. Clock output buffer(15) controls the output of the clock generator(12) by clock output control signal from the clock counter(13).