发明名称 Combined multiplexer
摘要 A Synchronous Digital Hierarchy multiplexer includes an Asynchronous Transfer Mode inverse multiplexer. The multiplexer is typically associated with ATM rate adaption and may be included in a telecommunications system having at least one data path connected at one end to the inverse multiplexer, the data path being connected at the other end thereof to a further inverse multiplexer.
申请公布号 GB9604619(D0) 申请公布日期 1996.05.01
申请号 GB19960004619 申请日期 1996.03.04
申请人 GPT LIMITED 发明人
分类号 H04J3/00;H04J3/06;H04J3/16;H04L12/56;H04Q3/00;H04Q11/04 主分类号 H04J3/00
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