发明名称 |
Apparatus and method for the analysis and resolution of operand dependencies |
摘要 |
<p>An apparatus performs source operand dependency analysis, perform register renaming and provide rapid pipeline recovery for a microprocessor capable of issuing and executing multiple instructions out-of-order in a single machine cycle. The apparatus first provides an enhanced means for rapid pipeline recovery due to a mispredicted branch or other store/load conflict or unsupported store/load forward circumstances. Second, the apparatus provides an improved instruction scheduling means wherein the oldest instructions that have all of their dependencies resolved are executed first. Third, the apparatus provides a means for enabling any execution or memory access instruction to execute out-of-order. Fourth, the apparatus provides a means for handling precise recovery of interrupts when processing instructions in out-of-order sequence. <IMAGE></p> |
申请公布号 |
EP0709769(A2) |
申请公布日期 |
1996.05.01 |
申请号 |
EP19950480141 |
申请日期 |
1995.09.22 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HESSON, JAMES HENRY;LEBLANC, JAY;CIAVAGLIA, STEPHEN J.;ESLING, WALTER THOMAS;WILCOX, PAMELA ANNE |
分类号 |
G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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