Low-voltage cascaded current mirror circuit with improved power supply rejection and method therefor

摘要

A circuit technique for improving power supply rejection of current mirror circuits. An input reference current is mirrored through a cascade of current mirror circuits whereby an error current is generated that represents the amount of current variation caused by power supply variations. The error current is then replicated into a current summing circuit which cancels out the effect of the error current. The output current is thus substantially independent of power supply variations.