| 摘要 |
A field effect transistor includes a III-V compound semiconductor substrate having a surface, III-V compound semiconductor layers successively disposed on the surface, including, an InAlAs layer, an InP layer, and an InGaAs layer, a gate recess penetrating through the InGaAs layer and the InP layer, and a gate electrode in the gate recess in contact with the InAlAs layer. In this structure, the contact surface of the gate electrode with the InAlAs layer is coplanar with the interface between the InP layer and the InAlAs layer.
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