| 摘要 |
<p>PURPOSE: To suppress the deterioration of element characteristics resulting from surge voltage, and to increase electrostatic capacitance by a method wherein between an internal electrode and the external electrode, in the position corresponding to the internal electrode, is insulated by arranging a highly insulative layer, which is mainly composed of lead borosilicate glass, on the surface of the internal electrode. CONSTITUTION: Internal electrodes 2-1 and 2-2 are formed on both surfaces of a square-shaped grain boundary insulating semiconductor ceramic which is mainly composed of SrTiO3 material, an insulating compound, which is mainly composed of lead borosilicate glass and containing 0.5 to 8.0wt.% Cr in terms of saturated oxide state, 0.5 to 5.0wt.% Cu in terms of saturated oxide state and 0.1 to 2.0wt.% Ti in terms of saturated oxide state, is applied to the surface excluding the junction part of the external electrode on the surface of the internal electrode, and an insulating compound layer 4 is formed by firing at 550 to 780 deg.C. Then, external electrodes 3-1 and 3-2 are formed on the junction part of the external electrodes. As a result, a chip varistor, having large electrostatic capacitance and improved electric noise resistance, can be obtained.</p> |
