| 摘要 |
PURPOSE: To make it possible to improve an area efficiency of a main surface where an active device is formed and form a coil having an MIM capacitor of a large capacitance value and a large inductance value without increasing chip sizes by forming a reactance device on the rear surface of a semiconductor substrate or inside a groove. CONSTITUTION: After the formation of FET on the surface of a GaAs substrate 1, vertical grooves 21, 22 and 23 are made in the rear surface of the GaAs substrate 1, thereby constituting MIM capacitors 24A and 24B along the surface, of the vertical grooves 21, 22 and 23 and the outer surface on the rear side of the GaAs substrate 1. This construction makes it possible to form the MIM capacitor whose capacitive value is proportional to the area of the GaAs substrate 1 on the rear side or more particularly, the sum of the area on the sides of the vertical grooves 21, 22 and 23 and the area of the GaAs substrate on the rear side. It is also possible to produce a larger capacitance value of the MIM capacitors 24A and 24B since a lower side electrode 24a is formed on the rear surface of the GaAs substrate 1. |
