发明名称 |
Controlled slew rate output buffer |
摘要 |
An output buffer that controls the slew rate of its output signal is disclosed. The buffer includes a pull-up and a pull-down bipolar transistor coupled at a common output node in series between VDD and VSS. The buffer also includes a first set of parallel MOS devices coupled between the common output node and the base of the pull-down bipolar transistor. A second set of parallel MOS devices are coupled between the base of the pull-up output stage bipolar transistor and VDD. The gates of each set of MOS devices are coupled to a digital select signal. The amount of current driving the base of each of the pull-up and pull-down transistors (when they are enabled) is determined by the number of MOS devices enabled by the digital select signal. Thus, the buffer of the present invention is able to adjust the slew rate of its output signal to accommodate different loads coupled to the common output node. |
申请公布号 |
AU3632895(A) |
申请公布日期 |
1996.03.29 |
申请号 |
AU19950036328 |
申请日期 |
1995.09.14 |
申请人 |
MICROUNITY SYSTEMS ENGINEERING, INC. |
发明人 |
JOHN G. CAMPBELL;BAN PAK WONG |
分类号 |
H03K19/003;H03K19/013;H03K19/0175 |
主分类号 |
H03K19/003 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|