| 摘要 |
<p>PURPOSE:To use the circuit element of low processing frequency by providing a first storage device to A/D convert and store an analog signal according to the rise of a sampling clock, and a second storage device to A/D-convert and store it according to the fall of it. CONSTITUTION:A first A/D conversion circuit 2 performs the A/D conversion of a video signal according to the rise of the sampling clock of a positive phase, and an even number-th digital signal is stored in a first picture memory element 6. Besides, a second A/D conversion circuit 3 performs the A/D conversion of the same video signal according to the rise of the sampling clock of a negative phase, and an odd number-th digital signal is stored in a second picture memory element 7. Then, these even number-th and odd number-th digital signals are written in the respective memory elements 6, 7 in the turn from a head address according to an address signal from a memory control circuit 5.</p> |
