| 摘要 |
PURPOSE: To simplify the processing circuit of a target generating and trail display controller. CONSTITUTION: This controller includes an image memory section 11 for generating a target, a timing generating section 12 for outputting an image memory reading-out line address signal S1, a trail processing section 13 for executing trail processing in synchronization with an antenna signal S2 in accordance with the inputted trail value and an output processing section 14. The line memory subjected to the trail processing is fed back to the image memory section 11. |
