发明名称 SYSTEM AND METHOD FOR COMMUNICATION BETWEEN DEVICES
摘要 <p>PROBLEM TO BE SOLVED: To obtain a method and system for communicating between equipments so that the finish of following bus operation is not delayed delayed while waiting the finish of all the preceding bus operation by outputting display of whether the operation of a second equipment is not related with the re-output of a signal by a first equipment. SOLUTION: The equipment 12 is a first processor and the equipment 14 is a second processor. In addition an equipment 16 is a bus adapter device and an equipment 18 is a memory device. These equipments 12, 14, 16 and 18 transmit information to each other through a system bus 20. By this constitution, a signal is outputted from the first equipments 12. In response to the signal, at least one activity is started by the second equipment 14. Display concerning whether the second equipment 14 finishes activity or whether the signal of the operation of the second equiment 14 is not related with the re-output of the signal by the first equipment 12 is outputted.</p>
申请公布号 JPH0877126(A) 申请公布日期 1996.03.22
申请号 JP19950200917 申请日期 1995.08.07
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 MIKAERU SUKOTSUTO AREN;RABUI KUMEERU ARIMIRI;JIYON MIKAERU KAISAA;UIRIAMU KAATO RUUCHIYAKU
分类号 G06F12/10;G06F13/36;G06F15/16;G06F15/173;G06F15/177;(IPC1-7):G06F15/163 主分类号 G06F12/10
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