发明名称 Multi-chip module packaging system
摘要 A three dimensional logic cube comprises a base plate having two vertically mounted backplanes attached thereto. A plurality of horizontally stacked substrates are coupled by connectors to the backplanes, with enough clearance between adjacent substrates to ensure heat dissipating air or fluid flow between the substrates. Typically, the substrates are multi-chip modules having a plurality of logic and interconnect chips attached at die mounting locations. Preferably, the logic and interconnect chips are attached to the substrate using flip TAB frames. The substrate includes a pattern interconnect for connecting together all of the chips. The logic chip is based on a standard 10K-50K gate array design with 100 micron pad spacing. The interconnect chip uses an interconnect pattern to connect the logic chips. The interconnect chip uses a lead placement identical to the logic chip, so that a single TAB frame can be used for both chips.
申请公布号 US5497027(A) 申请公布日期 1996.03.05
申请号 US19930159898 申请日期 1993.11.30
申请人 AT&T GLOBAL INFORMATION SOLUTIONS COMPANY;HYUNDAI ELECTRONICS AMERICA;SYMBIOS LOGIC INC. 发明人 CRAFTS, HAROLD S.
分类号 H01L25/00;H01L23/50;H01L25/065;(IPC1-7):H01L23/02 主分类号 H01L25/00
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