DEVICE FOR FEEDING OPERANDS TO (N+1) OPERATORS PROVIDED IN SYSTOLIC ARCHITECTURE

摘要

PURPOSE: To provide a device for supplying operands to 'n+1' operators disposed in a systolic architecture for reducing time necessary for processing an arithmetic sequence. CONSTITUTION: This device includes the preceding register AR(k) of 'n+1' designated to respectively process the sequence of the 'm+1' of the arithmetic of 'n+1', to supply operand to the operator OP (k) of 'n+1' disposed in this systolic architecture to relate with the operator and to house the operand of the first 'n+1' of arithmetic next to the arithmetic sequence of 'm+1' in the middle of present processing of the sequence of 'm+1'.