| 摘要 |
<p>PURPOSE: To erase an EEPROM with low power consumption by applying required voltages, respectively, to a source region and a control gate thereby bringing a drain region and a substrate into floating state. CONSTITUTION: When a memory cell 212 in EEPROM is erased, +12V is applied to a source region 26' through a switch SWS and a control gate 40 is grounded through a switch SW-G. A first P type substrate 22 and a drain 24 are impeded through switches SW-snb, SW-D and brought into floating state. Consequently, electrons 60 stored in a gate 38 migrate to the region of source 26' through Fowler-Nordhem tunneling caused by a field established between the gate 40 and source 26' and the cell 26' is erased. In this regard, a substrate 22' is floated to reduce the source current and a charge pump for negative charge can be eliminated resulting in erasure of flash EEPROM with low power consumption.</p> |
