| 摘要 |
PURPOSE:To execute diversified picture by a small hardware configuration by adopting the configuration such that a programmable logic circuit section and a control circuit section are densely coupled. CONSTITUTION:A CPU of the data processing unit 1 is made up of a data path section 2 and a control circuit section 3. Furthermore, an optional logic is realized by a programmable logic circuit section 5. Circuit information is programmed by a configuration circuit section 7 and fed from a memory 13 or 6. The basic CPU operation is executed by allowing the circuit section 3 to read an instruction stored in an instruction memory 12 and to decode the instruction and controlling the path section 2 through the use of the result. For example, in the case of considering a multiplication instruction, the multiplication is to be calculated with several clock signal times by using an ALU 9 and a shifter 8 only with the basic function of the CPU. However, when the circuit section 5 is programmed for a multiplier, the multiplication instruction stored in the memory 12 is executed by one clock by using the circuit section 5. |
