发明名称 Method of making integrated circuit package having multiple bonding tiers
摘要 An integrated circuit package, as well as a method for fabricating the same, is herein disclosed. The integrated circuit package of the present invention includes a cavity located within an assembly of laminated printed wiring boards. Such cavity provides two or more bonding tiers for connection with a semiconductor die. The contact pads are further connected, through conductive vias, to external connection means such as solder balls or pins. The semiconductor die is encapsulated with a molding compound through a transfer molding process. The present invention is especially advantageous in manufacturing pin grid array ("PGA") and ball grid array ("BGA")integrated circuit packages.
申请公布号 US5490324(A) 申请公布日期 1996.02.13
申请号 US19930121675 申请日期 1993.09.15
申请人 LSI LOGIC CORPORATION 发明人 NEWMAN, KEITH G.
分类号 H01L23/31;H01L23/498;(IPC1-7):H05K3/36 主分类号 H01L23/31
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