ELECTRICALLY ADJUSTABLE CLOCKING SYSTEM AND ADJUSTING METHODTHEREFOR

摘要

PURPOSE: To control the arrival time of clock signals in a master clock node on a chip to be clocked by turning the transmission time of the clock signals by the transmission line of an optional length. CONSTITUTION: A clock pulse phase control system synchronizes clock pulses in the node 112 of an electronic chip 110 to clocked. A phase detector 120 is provided with input connected to the output of an oscillator 116 and the input connected to a delay programming logic circuit 123, and by controlling the delay programming logic circuit 123 in response to the clock signals from the oscillator 116 and the clock signals from the delay programming logic circuit 123, delay time is changed. Thus, the clock pulses from the oscillator 116 are synchronized with the transmitted clock pulses through the node 112.