发明名称 |
FAULT TOLERANT INTERCONNECT TOPOLOGY |
摘要 |
An interconnect topology providing enhanced fault tolerance to a multi-component data processing system (10). The topology utilizes a plurality of rings (26-29) for interconnecting multiple system components (25a-d), or cards, at least two of which are indirectly connected so that communication therebetween is through a third component. Each of the system components (25a-d) is coupled to a set of at least two different rings (26-29) and includes interface circuits (282, 284) for routing data and a bridge (202) for permitting data to be transferred between the at least two rings (26-29).
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申请公布号 |
WO9602884(A1) |
申请公布日期 |
1996.02.01 |
申请号 |
WO1995US07885 |
申请日期 |
1995.06.21 |
申请人 |
EMC CORPORATION |
发明人 |
BITHER, DAVID, S.;LOEWY, CHARLES, S., F.;WILSON, PAUL, C. |
分类号 |
G06F11/00;G06F11/20;(IPC1-7):G06F13/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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