Potential rise accelerating circuit for logic bus line

摘要

The circuit includes a switch (S) which is controlled by a current controller (SST) and which switches a current path (SZ) temporarily in parallel with a pull-up resistor connected to the bus line, during the potential rise to a logic high. The current path is made ineffective when the logical high state is reached. During the transition to a logical low state, no switching of the parallel circuit takes place. The current in the current path is pref. constant. The current path may be a transistor driven as a current source connected in parallel with a pull-up resistor.