发明名称 |
Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices |
摘要 |
A process for the manufacture of an integrated voltage limiter and stabilizer component in a flash EEPROM memory device comprises a step of formation of an N type lightly doped well on a single-crystal silicon substrate; a step of formation of an active area on the surface of said N type well; a step of growth of a thin gate oxide layer over said active area; a step of implantation of a first heavy dose of N type dopant into said N type well to obtain an N type region; a step of implantation of a second heavy dose, higher than said first heavy dose, of N type dopant into said N type region to obtain an N+ contact region to both the N type well and said N type region; a step of implantation of a third heavy dose, higher than said first heavy dose, of P type dopant into said N type region to form a P+ region.
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申请公布号 |
US5486486(A) |
申请公布日期 |
1996.01.23 |
申请号 |
US19940301792 |
申请日期 |
1994.09.07 |
申请人 |
SGS-THOMSON MICROELECTRONICS, S.R.1. |
发明人 |
GHEZZI, PAOLO;MAURELLI, ALFONSO |
分类号 |
H01L21/8247;H01L21/329;H01L27/06;H01L27/115;H01L29/866;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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