Flexible DRAM access in a frame buffer memory and system.

摘要

A frame buffer memory device comprises dynamic random access memory (DRAM) array comprising a plurality of DRAM cells for buffering a set of pixel data that defines an image for display on a display device; sense amplifiers coupled to the DRAM cells of the DRAM array; circuitry for transferring the pixel data from a first page of the DRAM array to the sense amplifiers according to an access page command received over a rendering bus; circuitry for transferring the pixel data from the sense amplifiers to a second page of the DRAM array according to a duplicate page command received over the rendering bus.