发明名称 DYNAMIC IMAGE DECODER
摘要 PURPOSE:To make a motion detection circuit inconvenient and to reduce a circuit scale by inhibiting motion detection for reference images from being performed and letting highly accurate motion compensation predicting encoding be performed for interlace images. CONSTITUTION:Encoding object image signals 11 are encoded in an encoding part 14 by using reference image signals outputted from an interpolation value generation circuit 19 and an optimum motion vector outputted from a motion vector search circuit 17. For reference signals, the image signals of a position specified by a motion vector candidate 18 outputted from the motion vector search circuit 17 among the encoded image signals of past two fields stored in field memories 15 and 16 are used and an interpolation value is prepared by using the interpolation value generation circuit 19. During a motion vector search operation, the motion vector candidates successively generated from a motion vector candidate generation circuit 21 are inputted to the memories 15 and 16, the correlation operation of the encoding object image signals and the reference image signals generated in the interpolation value generation circuit 19 based on them is performed by a correlation operation circuit 20 and encoded data 26 are outputted by an optimum vector judgement circuit 22.
申请公布号 JPH089388(A) 申请公布日期 1996.01.12
申请号 JP19950122108 申请日期 1995.05.22
申请人 TOSHIBA CORP 发明人 KAMIYA YOSHIHARU;OTAKA TOSHINORI;MASUDA TADAAKI;UENO HIDEYUKI;YAMAGUCHI NOBORU;YAMAKAGE TOMOO
分类号 H04N19/50;H03M7/30;H04N7/14;H04N19/102;H04N19/105;H04N19/112;H04N19/126;H04N19/132;H04N19/137;H04N19/139;H04N19/14;H04N19/147;H04N19/159;H04N19/16;H04N19/172;H04N19/176;H04N19/186;H04N19/196;H04N19/42;H04N19/423;H04N19/46;H04N19/463;H04N19/503;H04N19/51;H04N19/517;H04N19/523;H04N19/53;H04N19/567;H04N19/57;H04N19/577;H04N19/587;H04N19/59;H04N19/593;H04N19/61;H04N19/625;H04N19/70;H04N19/80;H04N19/85;H04N19/91;H04N19/93 主分类号 H04N19/50
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