| 摘要 |
PURPOSE:To exactly detect the amount of image data to be compressed and transferred during the term of one field. CONSTITUTION:A compressing arithmetic unit 5 compresses the image data supplied from a decoder 6 with one field as a processing unit. The compressed image data are DMA-transferred through a DMA controller 7 to the DMA area of a main memory 2. A counter 8 counts the number of write signals (transfer request signals) supplied from the compressing arithmetic unit 5 to the DMA controller 7, and its count value is held in a register 9 at the timing of outputting a compression processing end signal outputted from the compressing arithmetic unit 5 once a field. When interruption processing request is generated based on the compression processing end signal, after processing under executing at that time is finished, a central processing unit 1 detects the amount of data transferred from the DMA controller 7 to the main memory 2 for the period of one field by reading the count value held in the register 9. |
