摘要 |
<p>PURPOSE: To provide a dynamic logic circuit capable of controlling plural dynamic logic stages in common by a single clock signal. CONSTITUTION: This device is provided with the plural transistor logic stages I11, I21; I12 and I22 for executing a logic function and a circuit controlled by synchronizing signals respectively supplied by conductor lines 300 and 400 that are clock distribution lines to the control electrodes of transistors T11, T21; T12 and T22 that are transfer transistors provided as switches on the input side of the respective logic stages. The transistors are turned to Schottky barrier field effect transistors and the synchronizing signals CK and inverted CK carried by the clock distribution lines are supplied to the control electrode of the transfer transistors T11, T21; T12 and T22 through one buffer stage I13, I23; I14 or I24 for each transfer transistor.</p> |