发明名称 MULTILAYERD WIRING FORMING METHOD
摘要 PURPOSE:To form a connection hole, in a self-alignment manner, in the region where an upper and a lower wiring patterns overlap with each other, by giving sensitivity difference to a photoresist coating film, between one region where the trench part of a lower layer wiring pattern and that of an upper layer wiring pattern overlap with each other and the other region. CONSTITUTION:After an interlayer insulating film 3 is patterned, and a trench part 5 similar to an upper layer wiring pattern 11 is formed in the direction rectangular to a lower wiring pattern 2, a wafer surface is flattened by a photoresist coating film. An aperture region M which can be projected on a wafer is exposed to light, via a photomask larger than the overlapping region A of the lower wiring pattern 2 and the trench part 5. Sensitivity difference due to the thickness of the photoresist coating film and the intensity of light reflected from a base layer is generated between the region A and its peripheral regions B, C. Thereby an aperure E can be formed in a self-alignment manner, in the phtoresist coating film in the region where the lower wiring pattern 2 and the trench part 5 overlap with each other.
申请公布号 JPH07326674(A) 申请公布日期 1995.12.12
申请号 JP19940141112 申请日期 1994.05.31
申请人 SONY CORP 发明人 SUZAWA HIROSHI
分类号 H01L21/3213;H01L21/027;H01L21/768;H01L23/522;(IPC1-7):H01L21/768;H01L21/321 主分类号 H01L21/3213
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