| 摘要 |
An integrated circuit structure, and a method of making same is disclosed wherein one or more patternable busses of conductive material (such as polysilicon) interconnect electrode strips (such as gate electrode strips) of the same conductive material formed over active areas (such as MOS islands). The busses are formed on the structure over field oxide portions thereon during the initial step of patterning the layer of conductive material to expose the active areas and to form the electrodes thereover. After further processing to form other electrode regions in the active areas (e.g., source and drain regions in N-MOS and P-MOS islands), but prior to formation of an insulation layer over the structure for formation of a metal layer thereon, the busses are subjected to a further patterning step to form custom interconnections, as desired, between various electrodes in the integrated circuit structure. By forming such busses during the initial patterning step to form a genetic structure, and then providing a second patterning step, wherein custom interconnections are formed in the layer of conductive material between electrodes of various active devices, some of the custom interconnections to form specific electrical circuits, formerly implemented at the metal layer level, can be eliminated, thereby reducing the total number of contacts formed between the electrodes and the metal layer or layers, as well as simplifying the metal wiring needed to form the desired electrical circuit. |
