| 摘要 |
PURPOSE:To improve integration by reducing the memory cell area of a semiconductor storage (DRAM). CONSTITUTION:A memory cell consists of a first memory cell consisting of an n-ch transistor 17 and a lower capacitor 19 and a second memory cell consisting of a p-ch transistor 18 and an upper capacitor 20 and the first memory cell and the second memory cell are connected to common word wire 2 and bit wire 8. When the potential of the word wire 2 is equal to or more than a power supply voltage, read/write are performed for the capacitor 19. When the potential is equal to or less than a grounding voltage, read/write are performed for the capacitor 20. The memory cell area is reduced since the word wire 2 and the bit wire 8 are common. |
