| 发明名称 |
Peripheral component interfacing system with bus voltage/logic supply comparison means |
| 摘要 |
Voltage levels of an external bus are sampled with results stored to adjust both an output driver and input receiver. The resulting logic signal levels for the input/output (I/O) interface are maintained within acceptable ranges of the standard I/O signal levels.
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| 申请公布号 |
US5469082(A) |
申请公布日期 |
1995.11.21 |
| 申请号 |
US19940352331 |
申请日期 |
1994.12.08 |
| 申请人 |
AT&T GLOBAL INFORMATION SOLUTIONS COMPANY;HYUNDAI ELECTRONICS AMERICA |
发明人 |
BULLINGER, PHILIP W.;MCMANUS, MICHAEL J. |
| 分类号 |
G06F3/00;H03K19/0175;H03K19/0185;(IPC1-7):H03K19/017 |
主分类号 |
G06F3/00 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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