发明名称 |
Encoding/decoding circuit, and digital video system comprising the circuit |
摘要 |
An integrated circuit for encoding digital data in the recording mode and decoding digital data in the reproduction mode using an error correction product code can be used in combination with a standard frame memory when use is made of a high-frequency system clock. An error correction strategy suitable for digital video is implemented in the circuit.
|
申请公布号 |
US5469448(A) |
申请公布日期 |
1995.11.21 |
申请号 |
US19940193613 |
申请日期 |
1994.02.08 |
申请人 |
DENISSEN, ADRIANUS J. M.;ZWAANS, BERNARDUS A. M. |
发明人 |
DENISSEN, ADRIANUS J. M.;ZWAANS, BERNARDUS A. M. |
分类号 |
G11B20/18;G11B27/36;H03M13/00;H03M13/11;H03M13/15;H04N5/783;H04N5/926;H04N5/945;H04N7/26;H04N9/804;H04N9/806;(IPC1-7):G06F11/10 |
主分类号 |
G11B20/18 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|