发明名称 BUILT-IN TESTING CIRCUIT
摘要 <p>PURPOSE:To provide a built-in testing circuit enabling the realization of passing mode function without causing the enlargement of circuit scale. CONSTITUTION:Output terminals TO1-TO3 are connected not to the Q-output side of flip-flops 11-13 serving as sequential logical circuits but to the output side of exclusive OR circuits 41-43 serving as logical circuits disposed on the D-input side. During a passing mode at the non-testing time, the flip-flops 11-13 are held in the non-acting state, and an input signal DI is outputted as a signal Do as it is from an output terminal To. A built-in testing circuit with passing mode function can be thereby realized without causing the enlargement of circuit scale.</p>
申请公布号 JPH07301662(A) 申请公布日期 1995.11.14
申请号 JP19940094304 申请日期 1994.05.06
申请人 SONY CORP 发明人 SUGAWARA TAKENORI
分类号 G01R31/28;H01L21/66;(IPC1-7):G01R31/28 主分类号 G01R31/28
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