CMOS CLAMPING CIRCUIT AND TRANSMISSION CIRCUIT USING THIS CIRCUIT

摘要

PURPOSE:To perform high-speed signal transmission by low amplitude by a simple circuit and to provide a CMOS clamping circuit and a transmission circuit capable of the high integration and power consumption reduction of a digital processor whose basic constitution is a CMOS or bipolar CMOS circuit. CONSTITUTION:In the digital processor by an electronic circuit package PKG, the large-scale integrated circuit device VLSI1 of the transmission circuit is provided with a signal transmission circuit BD composed of plural unit transmission circuits UBDs and the respective unit transmission circuits UBDs for constituting the signal transmission circuit BD are provided with a level detection circuit DET provided with a sense-amplifier SA1 and a level shift circuit LS1 by MOSFETs Q4, Q5 and Q3 whose transistor size ratio is different or the like. The transmission circuit is connected through a transmission line L0 to the large-scale integrated circuit VLSI2 of a reception circuit provided with a signal reception circuit BR constituted of plural unit reception circuits UBRs provided with the level shift circuit LS2 and the sense-amplifier SA2.