发明名称 PLL FREQUENCY SYNTHESIZER
摘要 In case of switching a frequency of an output signal of a voltage control oscillator, an arithmetic unit outputs to a variable frequency divider such a frequency divisor that the voltage control oscillator outputs a signal having a predetermined frequency ranging between frequencies before and after switching and thereafter the frequency divisor to be output to the variable frequency divider is changed to such a frequency divisor that the voltage control oscillator outputs a signal having the frequency after switching when the frequency of the output signal from the voltage control oscillator detected by a counter and a register reaches a frequency previously stored in a memory circuit.
申请公布号 CA2148896(A1) 申请公布日期 1995.11.10
申请号 CA19952148896 申请日期 1995.05.08
申请人 NEC CORPORATION 发明人 OSAKA, MASAHIKO
分类号 H03L7/183;H03L7/10;H03L7/197;(IPC1-7):H03L7/18;H03J7/02 主分类号 H03L7/183
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