发明名称 |
Test signal output circuit in LSI |
摘要 |
An object of the present invention is to reduce the number of external connection terminals of an LSI that are required for performing testing in an operating state. The test signal output circuit of the present invention comprises one or more test signal output terminals, one or more test mode signal input terminals, a decoder for interpreting signals from the test mode signal input terminals, and one or more selectors for selecting internal signals in response to the output of the decoder and outputting the selected signals from the respective test signal output terminal. |
申请公布号 |
US5465257(A) |
申请公布日期 |
1995.11.07 |
申请号 |
US19930025966 |
申请日期 |
1993.03.03 |
申请人 |
NEC CORPORATION |
发明人 |
YAMAHATA, HITOSHI;KUSUDA, MASAHIRO |
分类号 |
G01R31/3185;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/3185 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|