| 摘要 |
The system for applying operators to pixel information for image compression includes a supply providing the operands of n+1 operators (OP(O), ..OP(k), ..OP(n)) arranged in a systolic architecture. The operates execute m+1 sequences of n+1 operations. The equipment includes n+1 ante-registers (AR(O), ..AR(n)) associated with the operators (OP(k)), storing the n+1 first operands during the current execution of m+1 sequences of operations. A device (M(k)) is associated with each operator (OP(k)) to select an operand from the value contained in the ante-register (AR(K)) and that value used by the preceding operator (OP(k-1)). <IMAGE> |
