发明名称 |
Programmable multiplexer logic cell |
摘要 |
A programmable logic cell suitable for use in a programmable gate array and able to produce any logical function of two inputs, operate as a 2 to 1 multiplexor or a data latch is formed by four multiplexors, five inverters and an OR gate to provide a very fast programmable logic cell.
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申请公布号 |
US5463327(A) |
申请公布日期 |
1995.10.31 |
申请号 |
US19930063557 |
申请日期 |
1993.05.19 |
申请人 |
PLESSEY SEMICONDUCTORS LIMITED |
发明人 |
HASTIE, NEIL S. |
分类号 |
H03K19/173;H03K19/177;(IPC1-7):H03K19/173 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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