| 摘要 |
<p>A timing generator contains an oscillator section (10) formed with a plural number of stages (S1-SN) for respectively producing a like number of stage signals (VS1-VSN) that sequentially change signal values at a basic oscillator frequency (f0). The oscillator section is typically implemented as a ring oscillator. In response to the stage signals, a timing-signal generating section (14) generates one or more timing signals (VT1-VTM), each having at least two transitions corresponding to transitions of two or more of the stage signals. A control section (12), preferably arranged in a phase-locked loop; causes the oscillator frequency and a reference frequency (fR) to have a substantially fixed relationship.</p> |
