| 摘要 |
The testing system for a circuit board carrying a number of ICs and associated components uses a number of test pins contacting respective test points. During a learning phase, a fault-free circuit board is contacted and the impedances between the adjacent test pins are loaded in a memory for comparison with the corresponding values obtained for the tested circuit board. The impedances are also compared with the measured impedances between the test pins when the associated leads are disconnected. Pref. the voltages for each pair of test pins are also compared for the fault-free circuit board and the tested circuit board. |
