Method of fabricating an insulated gate semiconductor device

摘要

An improved insulated gate semiconductor device comprises a high-concentration p-type semiconductor region formed widely enough to protrude over n-type emitter regions without reaching an n-type epitaxial layer over a p-type base region only in first regions wherein the n-type emitter regions are wider than second regions as viewed from the top of the device. A gate threshold voltage VGE(th) has a relatively high level VGE(th-High) in the first regions, so that a low collector-emitter saturation voltage VCE(sat) and a low saturation current ICE(sat) are achieved. This provides for a high short-circuit tolerance as well as a high latch-up tolerance with low losses.