发明名称 PRODUCTION PROCESS FOR THIN FILM MULTILAYER WIRING BOARD
摘要 PURPOSE:To form a thick-film wiring pattern and reduce the 'pitch thereof by forming a conductor film on a first thin film insulation pattern forming face, thereby forming one electrode, and building up the conductor by the electroplating to make it flush with the pattern top face whereby a second thin film insulation resin pattern having required via-holes is formed. CONSTITUTION:A surface with a conductor layer 10 formed thereon is patterned to expose a wiring pattern forming region, thereby forming a plating-resist pattern 11a on a first resin insulator layer 9a. Using the layer 10a as a plating electrode, the wiring pattern forming region is built up with a conductor so as to be flush with the layer 9a, thereby forming a first wring pattern layer 12a. A polyimide resin layer is formed as a second resin insulation layer 9b having openings 9b' far forming pier connection parts. Thus, the forming of the inner layer insulation resin layer can be repeated enough to meet the performance of high-speed LSI's.
申请公布号 JPH07235768(A) 申请公布日期 1995.09.05
申请号 JP19940027962 申请日期 1994.02.25
申请人 TOSHIBA CORP 发明人 KOBARIKAWA TAKASHI
分类号 H05K3/24;H05K3/40;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/24
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