发明名称 Power-on reset circuit.
摘要 A power-on reset circuit for providing the stable generation of a reset signal without being affected by the rising characteristic of a power-supply voltage. In the novel power-on reset circuit, a flip-flop (13) composed of a pair of cross-connected inverters (11, 12) is used, a common connection point between a diode (Q15) and a capacitor (C11) connected to each other in series is connected to a node (N11), which is one output of the flip-flop, an output signal at a node (N12), which is another output of the flip-flip, is supplied to a reset pulse generator (16) via an inverter (15), a change in the output signal is detected by the reset pulse generator, and a reset pulse is generated based on the detected signal change. <IMAGE>
申请公布号 EP0631389(A3) 申请公布日期 1995.08.30
申请号 EP19940401428 申请日期 1994.06.24
申请人 SONY CORPORATION 发明人 NAKASHIMA, KATSUYA, C/O SONY NAGASAKI CORP
分类号 H03K17/22;H03K3/356;H03K3/3565 主分类号 H03K17/22
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