ZENTRALE VERARBEITUNGSEINHEIT MIT DER FÄHIGKEIT, BEFEHLE MIT VARIABLEN LÄNGEN ZU UNTERSTÜTZEN.

摘要

A central processing unit for a digital computer. In one embodiment, the central processing unit comprises a plurality of pointer registers that may be used during instruction execution to directly address other registers. In a second embodiment, the central processing unit comprises a size register that is loaded during the decode of an operation code with a size code indicating the data path width for that operation code. During instruction execution, the size code may be used at various times to determine data path width.